SDRAM Winbond 512Mbit
- RS品番:
- 188-2642
- メーカー型番:
- W9751G8KB25I
- メーカー/ブランド名:
- Winbond
取扱終了
- RS品番:
- 188-2642
- メーカー型番:
- W9751G8KB25I
- メーカー/ブランド名:
- Winbond
The W9751G8KB is a 512M bits DDR2 SDRAM, and speed involving -18/-25/25I and -3.
Double Data Rate architecture: two data transfers per clock cycle
CAS Latency: 3, 4, 5, 6 and 7
Burst Length: 4 and 8
Bi-directional, differential data strobes (DQS and /DQS ) are transmitted / received with data
Edge-aligned with Read data and center-aligned with Write data
DLL aligns DQ and DQS transitions with clock
Differential clock inputs (CLK and /CLK)
Data masks (DM) for write data
Commands entered on each positive CLK edge, data and data mask are referenced to both edges of /DQS
Posted /CAS programmable additive latency supported to make command and data bus efficiency
Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality
Auto-precharge operation for read and write bursts
Auto Refresh and Self Refresh modes
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = Read Latency - 1 (WL = RL - 1)
Interface: SSTL_18
CAS Latency: 3, 4, 5, 6 and 7
Burst Length: 4 and 8
Bi-directional, differential data strobes (DQS and /DQS ) are transmitted / received with data
Edge-aligned with Read data and center-aligned with Write data
DLL aligns DQ and DQS transitions with clock
Differential clock inputs (CLK and /CLK)
Data masks (DM) for write data
Commands entered on each positive CLK edge, data and data mask are referenced to both edges of /DQS
Posted /CAS programmable additive latency supported to make command and data bus efficiency
Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality
Auto-precharge operation for read and write bursts
Auto Refresh and Self Refresh modes
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = Read Latency - 1 (WL = RL - 1)
Interface: SSTL_18
特性 | |
---|---|
メモリサイズ | 512Mbit |
構成 | 64M x 8 bit |
1ワード当たりのビット数 | 8bit |
ワード数 | 64M |
実装タイプ | 表面実装 |
パッケージタイプ | WBGA |
ピン数 | 60 |
寸法 | 12.6 x 8.1 x 0.6mm |
高さ | 0.6mm |
長さ | 12.6mm |
動作温度 Max | +95 °C |
動作供給電圧 Min | 1.7 V |
動作温度 Min | -40 °C |
幅 | 8.1mm |
動作供給電圧 Max | 1.9 V |